// *** Complemantry 3Phase PWM output *** 
PwmOut PWMU2L(PA_8); // PWM2_1 1L
PwmOut PWMU2H(PA_7); // PWM2_1N 1H
PwmOut PWMV2L(PA_9); // PWM2_2 2L
PwmOut PWMV2H(PB_0); // PWM2_2N 2H
PwmOut PWMW2L(PA_10); // PWM2_3 3L
PwmOut PWMW2H(PB_1); // PWM2_3N 3H
PwmOut PWMU1L(PC_6); // PWM1_1 1L
PwmOut PWMU1H(PA_5); // PWM1_1N 1H
PwmOut PWMV1L(PC_7); // PWM1_2 2L
PwmOut PWMV1H(PB_14); // PWM1_2N 2H
PwmOut PWMW1L(PC_8); // PWM1_3 3L
PwmOut PWMW1H(PB_15); // PWM1_3N 3H

void init_PWM(void) {
    PWMU1L.period_us(100);      // TIM1の仮の初期periodをAPIで設定しておく
    PWMV1L.period_us(100);      // TIM1の仮の初期periodをAPIで設定しておく
    PWMW1L.period_us(100);      // TIM1の仮の初期periodをAPIで設定しておく
    TIM1->CCR1 = TIM1->CCR2 = TIM1->CCR3 = 0;   // 初期デューティ0
    TIM8->CCR1 = TIM8->CCR2 = TIM8->CCR3 = 0;   // 初期デューティ0
    TIM1->CR1 &= 0xfffe;
    TIM8->CR1 &= 0xfffe;

    TIM1->ARR = PWMDIV;         // PWM division(period us)=PWMDIV(1000)
    TIM1->CCER = 0x0555;        // 相補PWM enable
    TIM1->BDTR = 0x805a;        // DeadTime:5.5556ns*5ah(90)=500ns(b7-5:0xx)
    TIM1->PSC = 8;              // Prescale=(PSC+1)*5.55556nS 20KHz
    // 使用する各ポートはAF3を使う
    GPIOA->AFR[0] |= 0x00300000;    // PA5
    GPIOA->AFR[1] |= 0x00000000;
    GPIOB->AFR[0] |= 0x00000000;
    GPIOB->AFR[1] |= 0x33000000;    // PB14,15
    GPIOC->AFR[0] |= 0x33000000;    // PC6,7
    GPIOC->AFR[1] |= 0x00000003;    // PC8
    // 使用する各ポートはAFRにセット
    GPIOA->MODER |=  0x00000800;    // PA5
    GPIOB->MODER |=  0xA0000000;    // PB14,15
    GPIOC->MODER |=  0x0002A000;    // PC6,7,8

    RCC->APB2ENR |= 0x2;       // TIM8 clock enable
    TIM8->CR1 = 0x1;           // TIM8 counter enable
    TIM8->CR2 = 0;
    TIM8->ARR = 1000;          // PWM division(period us)=PWMDIV(1000)
    TIM8->CCMR1 = 0x6868;      // OC1,OC2:PWM mode
    TIM8->CCMR2 = 0x0068;      // OC3:PWM mode

    TIM8->CCER = 0x0555;       // 相補PWM enable
    TIM8->BDTR = 0x805a;       // DeadTime:5.5556ns*5ah(90)=500ns(b7-5:0xx)
    TIM8->DIER = 0;
    TIM8->EGR = 3;
    TIM8->PSC = 8;             // Prescale=(PSC+1)*5.55556nS 20KHz

//    TIM1->CNT = 0;
//    TIM8->CNT = 0;
    TIM1->CR1 |= 0x1;
    TIM8->CR1 |= 0x1;
}